From e54b3dfd77c4f72064fd62dd69f8bcc010ed0ef0 Mon Sep 17 00:00:00 2001
From: Francis Fan <francis.fan@rock-chips.com>
Date: Tue, 7 Nov 2017 17:50:11 +0800
Subject: [PATCH 1/3] rockchip: efuse: Support rk322x non-secure efuse.

Change-Id: Ia25df975d21d7c97cf090f0d374074c2c5cd1a58
Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
---
 drivers/misc/rockchip-efuse.c | 75 +++++++++++++++++++++++++++++++++--
 1 file changed, 71 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2520c6a38e..36edf8d53d 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -27,6 +27,17 @@
 #define RK3399_STROBE           BIT(1)
 #define RK3399_CSB              BIT(0)
 
+#define RK3288_A_SHIFT          6
+#define RK3288_A_MASK           0x3ff
+#define RK3288_NFUSES           32
+#define RK3288_BYTES_PER_FUSE   1
+#define RK3288_PGENB            BIT(3)
+#define RK3288_LOAD             BIT(2)
+#define RK3288_STROBE           BIT(1)
+#define RK3288_CSB              BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
+
 struct rockchip_efuse_regs {
 	u32 ctrl;      /* 0x00  efuse control register */
 	u32 dout;      /* 0x04  efuse data out register */
@@ -53,7 +64,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
 	 */
 
 	struct udevice *dev;
-	u8 fuses[128];
+	u8 fuses[128] = {0};
 	int ret;
 
 	/* retrieve the device */
@@ -77,7 +88,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
 }
 
 U_BOOT_CMD(
-	rk3399_dump_efuses, 1, 1, dump_efuses,
+	rockchip_dump_efuses, 1, 1, dump_efuses,
 	"Dump the content of the efuses",
 	""
 );
@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	u8 *buffer = buf;
+	int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+	if (size > (max_size - offset))
+		size = max_size - offset;
+
+	/* Switch to read mode */
+	writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
+	udelay(1);
+
+	while (size--) {
+		writel(readl(&efuse->ctrl) &
+				(~(RK3288_A_MASK << RK3288_A_SHIFT)),
+				&efuse->ctrl);
+		/* set addr */
+		writel(readl(&efuse->ctrl) |
+				((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+				&efuse->ctrl);
+		udelay(1);
+		/* strobe low to high */
+		writel(readl(&efuse->ctrl) |
+				RK3288_STROBE, &efuse->ctrl);
+		ndelay(60);
+		/* read data */
+		*buffer++ = readl(&efuse->dout);
+		/* reset strobe to low */
+		writel(readl(&efuse->ctrl) &
+				(~RK3288_STROBE), &efuse->ctrl);
+		udelay(1);
+	}
+
+	/* Switch to standby mode */
+	writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
+
+	return 0;
+}
+
 static int rockchip_efuse_read(struct udevice *dev, int offset,
 			       void *buf, int size)
 {
-	return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+	EFUSE_READ efuse_read = NULL;
+
+	efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+	if (!efuse_read)
+		return -ENOSYS;
+
+	return (*efuse_read)(dev, offset, buf, size);
 }
 
 static const struct misc_ops rockchip_efuse_ops = {
@@ -146,7 +206,14 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 }
 
 static const struct udevice_id rockchip_efuse_ids[] = {
-	{ .compatible = "rockchip,rk3399-efuse" },
+	{
+		.compatible = "rockchip,rk3288-efuse",
+		.data = (ulong)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3399-efuse",
+		.data = (ulong)&rockchip_rk3399_efuse_read,
+	},
 	{}
 };
 

From d2794118b9ddbe8e76da4249d2de393476337e5b Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 2 Aug 2018 20:33:16 +0800
Subject: [PATCH 2/3] rockchip: efuse: support rk3328 non-secure efuse

Change-Id: Ie74764ef946b79c2e9f73e9082c1cb8bbc288abb
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 drivers/misc/rockchip-efuse.c | 66 +++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 36edf8d53d..f2d362cef8 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -36,6 +36,13 @@
 #define RK3288_STROBE           BIT(1)
 #define RK3288_CSB              BIT(0)
 
+#define RK3328_INT_STATUS	0x0018
+#define RK3328_DOUT		0x0020
+#define RK3328_AUTO_CTRL	0x0024
+#define RK3328_INT_FINISH	BIT(0)
+#define RK3328_AUTO_ENB		BIT(0)
+#define RK3328_AUTO_RD		BIT(1)
+
 typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
 
 struct rockchip_efuse_regs {
@@ -46,6 +53,10 @@ struct rockchip_efuse_regs {
 	u32 jtag_pass; /* 0x10  JTAG password */
 	u32 strobe_finish_ctrl;
 		       /* 0x14	efuse strobe finish control register */
+	u32 int_status;/* 0x18 */
+	u32 reserved;  /* 0x1c */
+	u32 dout2;     /* 0x20 */
+	u32 auto_ctrl; /* 0x24 */
 };
 
 struct rockchip_efuse_platdata {
@@ -181,6 +192,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value, status;
+	u8 *buffer;
+	int ret = 0, i = 0, j = 0;
+
+	/* Max non-secure Byte */
+	if (size > 32)
+		size = 32;
+
+	/* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+	offset += 96;
+	addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+						RK3399_BYTES_PER_FUSE;
+	addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+						RK3399_BYTES_PER_FUSE;
+	addr_offset = offset % RK3399_BYTES_PER_FUSE;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+	if (!buffer)
+		return -ENOMEM;
+
+	for (j = 0; j < addr_len; j++) {
+		writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+		       ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+		         &efuse->auto_ctrl);
+		udelay(5);
+		status = readl(&efuse->int_status);
+		if (!(status & RK3328_INT_FINISH)) {
+			ret = -EIO;
+			goto err;
+		}
+		out_value = readl(&efuse->dout2);
+		writel(RK3328_INT_FINISH, &efuse->int_status);
+
+		memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
+		i += RK3399_BYTES_PER_FUSE;
+	}
+	memcpy(buf, buffer + addr_offset, size);
+err:
+	free(buffer);
+
+	return ret;
+}
+
 static int rockchip_efuse_read(struct udevice *dev, int offset,
 			       void *buf, int size)
 {
@@ -210,6 +272,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
 		.compatible = "rockchip,rk3288-efuse",
 		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
+	{
+		.compatible = "rockchip,rk3328-efuse",
+		.data = (ulong)&rockchip_rk3328_efuse_read,
+	},
 	{
 		.compatible = "rockchip,rk3399-efuse",
 		.data = (ulong)&rockchip_rk3399_efuse_read,

From 81fd1a75139801213cd29af46df7b282648f4559 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 23 Jan 2020 21:09:38 +0000
Subject: [PATCH 3/3] WIP: rockchip: get serial and ethaddr from efuse

---
 arch/arm/dts/rk3288.dtsi          |  3 +--
 arch/arm/dts/rk3328.dtsi          | 14 ++++++++++++++
 configs/evb-rk3328_defconfig      |  3 +++
 configs/evb-rk3399_defconfig      |  2 ++
 configs/miqi-rk3288_defconfig     |  2 ++
 configs/rock64-rk3328_defconfig   |  2 ++
 configs/tinker-rk3288_defconfig   |  1 +
 configs/tinker-s-rk3288_defconfig |  1 +
 8 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 866fc08215..b0d1b2f90a 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -910,8 +910,7 @@
 
 	efuse: efuse@ffb40000 {
 		compatible = "rockchip,rk3288-efuse";
-		reg = <0xffb40000 0x10000>;
-		status = "disabled";
+		reg = <0xffb40000 0x20>;
 	};
 
 	gic: interrupt-controller@ffc01000 {
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index 6dbb9bde..3d551431 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -16,6 +16,7 @@
 #include <misc.h>
 #include <u-boot/crc.h>
 #include <u-boot/sha256.h>
+#include <hash.h>
 
 #include <asm/arch-rockchip/misc.h>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2520c6a3..0e2cab02 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -14,6 +14,7 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <misc.h>
+#include <stdlib.h>
 
 #define RK3399_A_SHIFT          16
 #define RK3399_A_MASK           0x3ff
